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A thermal-throttling server in 3D multicore chips

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Published:24 March 2014Publication History

ABSTRACT

Thermal-aware real-time task scheduling in three-dimensional (3D) multicore chips is complicated because of the heat effect of vertically stacked cores and the trade-off between performance requirements and overheating. This study proposes a thermal-throttling server that renders a thermal-aware to existing real-time task scheduling algorithms. Admission control is subsequently presented to guarantee the thermal and timing constraints in the embedded systems. This study evaluates the performance level of the proposed model by using a series of workloads; the findings yielded encouraging results in terms of scheduling ability and prevention of overheating.

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  • Published in

    cover image ACM Conferences
    SAC '14: Proceedings of the 29th Annual ACM Symposium on Applied Computing
    March 2014
    1890 pages
    ISBN:9781450324694
    DOI:10.1145/2554850

    Copyright © 2014 ACM

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    • Published: 24 March 2014

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    Acceptance Rates

    SAC '14 Paper Acceptance Rate218of939submissions,23%Overall Acceptance Rate1,650of6,669submissions,25%

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