Monica Farkash
ABSTRACT
This paper addresses the challenges of minimizing the time and resources required to validate the changes between two Hardware (HW) model iterations of the same design. It introduces CLTV (Coverage Learned Targeted Validation), an automatic framework which learns during the verification process of the HW and uses the learned information to target the areas of the design that are affected by the incremental HW model iterations.
Our paper defines new concepts, presents our implementation of the supporting algorithms, and shows actual results on an IBM POWER8 processor with outstanding results.
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