skip to main content
10.1145/2852339.2852343acmotherconferencesArticle/Chapter ViewAbstractPublication PagesrapidoConference Proceedingsconference-collections
research-article

Towards bridging the gap between academic and industrial heterogeneous system architecture design space exploration

Published:18 January 2016Publication History

ABSTRACT

Heterogeneous system architectures (HSA) have become a focal point and a commodity not only in high-performance but also in embedded systems. In existing freely available or open-sourced design space exploration (DSE) tools, we typically find software-only models of proprietary architectures without any register-transfer level (RTL) hardware descriptions available, leading to a shortage in research tools for academia. This prevents the DSE and does also not suit the requirements for designing the resulting HSAs in the way that simulation results cannot immediately be fed back into realistic hardware models, therefore making it hard if not infeasible to properly verify and validate novel findings against real-world implementations. Here, tools are required that enable a holistic DSE in order to achieve a desired hardware/software co-design for heterogeneous systems. In this paper we present an approach that closes this gap, enabling a holistic DSE for academia and academic research by establishing a freely available HSA virtual platform (VP) with its software as well as its corresponding RTL description.

References

  1. K. Andryc, M. Merchant, and R. Tessier. Flexgrip: A soft GPGPU for fpgas. In 2013 International Conference on Field-Programmable Technology, FPT 2013, Kyoto, Japan, December 9-11, 2013, pages 230--237, 2013.Google ScholarGoogle ScholarCross RefCross Ref
  2. A. Bakhoda, G. Yuan, W. Fung, H. Wong, and T. Aamodt. Analyzing cuda workloads using a detailed gpu simulator. In Performance Analysis of Systems and Software, 2009. ISPASS 2009. IEEE International Symposium on, pages 163--174, April 2009.Google ScholarGoogle ScholarCross RefCross Ref
  3. R. Balasubramanian, V. Gangadhar, Z. Guo, C.-H. Ho, C. Joseph, J. Menon, M. P. Drumond, R. Paul, S. Prasad, P. Valathol, and K. Sankaralingam. Enabling gpgpu low-level hardware explorations with miaow - an open source rtl implementation of a gpgpu. ACM Transactions on Architecture and Code Optimization, 2015. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. N. Binkert, B. Beckmann, G. Black, S. K. Reinhardt, A. Saidi, A. Basu, J. Hestness, D. R. Hower, T. Krishna, S. Sardashti, R. Sen, K. Sewell, M. Shoaib, N. Vaish, M. D. Hill, and D. A. Wood. The gem5 simulator. SIGARCH Comput. Archit. News, 39(2):1--7, Aug. 2011. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. J. Bush, P. Dexter, T. N. Miller, and A. Carpenter. Nyami: a synthesizable gpu architectural model for general-purpose and graphics-specific workloads. In ISPASS, pages 173--182, 2015.Google ScholarGoogle ScholarCross RefCross Ref
  6. S. Collange, M. Daumas, D. Defour, and D. Parello. Barra: A parallel functional simulator for gpgpu. In Modeling, Analysis Simulation of Computer and Telecommunication Systems (MASCOTS), 2010 IEEE International Symposium on, pages 351--360, Aug 2010. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. G. F. Diamos, A. R. Kerr, S. Yalamanchili, and N. Clark. Ocelot: A dynamic optimization framework for bulk-synchronous applications in heterogeneous systems. In Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, PACT '10, pages 353--364, New York, NY, USA, 2010. ACM. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. J.-H. Ding, W. Hsu, B. Jeng, S. Hung, and Y. Chung. Hsaemu - a full system emulator for hsa platforms. In Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2014 International Conference on, pages 1--10, Oct 2014. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. L. Fossati, T. Schuster, R. Meyer, and M. Berekovic. Socrocket: a virtual platform for soc design. DAta System In Aerospace (DASIA), 2013.Google ScholarGoogle Scholar
  10. T. Grosser, A. Gremm, S. Veith, G. Heim, W. Rosenstiel, V. Medeiros, and M. Eusebio de Lima. Exploiting heterogeneous computing platforms by cataloging best solutions for resource intensive seismic applications. In INTENSIVE 2011, The Third International Conference on Resource Intensive Applications and Services, pages 30--36, 2011.Google ScholarGoogle Scholar
  11. J. Jang, H. Wang, E. Kwon, J. Lee, and N. Kim. Workload-aware optimal power allocation on single-chip heterogeneous processors. Parallel and Distributed Systems, IEEE Transactions on, PP(99):1--1, 2015.Google ScholarGoogle Scholar
  12. H. Kim, J. Lee, N. B. Lakshminarayana, J. Sim, J. Lim, and T. Pho. Macsim: A cpu-gpu heterogeneous simulation framework. Technical report, Georgia Instritute of Technology, 2012.Google ScholarGoogle Scholar
  13. S. Lee and W. W. Ro. Parallel gpu architecture simulation framework exploiting work allocation unit parallelism. In Performance Analysis of Systems and Software (ISPASS), 2013 IEEE International Symposium on, pages 107--117, April 2013.Google ScholarGoogle ScholarCross RefCross Ref
  14. G. Malhotra, S. Goel, and S. Sarangi. Gputejas: A parallel simulator for gpu architectures. In High Performance Computing (HiPC), 2014 21st International Conference on, pages 1--10, Dec 2014.Google ScholarGoogle ScholarCross RefCross Ref
  15. T. Miller. Openshader - open architecture gpu simulator and implementation.Google ScholarGoogle Scholar
  16. J. Power, J. Hestness, M. Orr, M. Hill, and D. Wood. gem5-gpu: A heterogeneous cpu-gpu simulator. Computer Architecture Letters, 13(1), Jan 2014.Google ScholarGoogle ScholarCross RefCross Ref
  17. P. Siegl, R. Buchty, and M. Berekovic. Revealing potential performance improvements by utilizing hybrid work-sharing for resource-intensive seismic applications. In Parallel, Distributed and Network-Based Processing (PDP), 2015 23rd Euromicro International Conference on, pages 659--663, March 2015. Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. R. Ubal, B. Jang, P. Mistry, D. Schaa, and D. Kaeli. Multi2sim: A simulation framework for cpu-gpu computing. In Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques, PACT '12, pages 335--344, New York, NY, USA, 2012. ACM. Google ScholarGoogle ScholarDigital LibraryDigital Library
  19. D. Valverde. Theia: ray graphic processing unit.Google ScholarGoogle Scholar
  20. P.-H. Wang, C.-W. Lo, C.-L. Yang, and Y.-J. Cheng. A cycle-level simt-gpu simulation framework. In Performance Analysis of Systems and Software (ISPASS), 2012 IEEE International Symposium on, pages 114--115, April 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
  21. V. Zakharenko, T. Aamodt, and A. Moshovos. Characterizing the performance benefits of fused cpu/gpu systems using fusionsim. In Design, Automation Test in Europe Conference Exhibition (DATE), 2013, pages 685--688, March 2013. Google ScholarGoogle ScholarDigital LibraryDigital Library

Index Terms

  1. Towards bridging the gap between academic and industrial heterogeneous system architecture design space exploration

          Recommendations

          Comments

          Login options

          Check if you have access through your login credentials or your institution to get full access on this article.

          Sign in
          • Published in

            cover image ACM Other conferences
            RAPIDO '16: Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools
            January 2016
            41 pages
            ISBN:9781450340724
            DOI:10.1145/2852339

            Copyright © 2016 ACM

            Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

            Publisher

            Association for Computing Machinery

            New York, NY, United States

            Publication History

            • Published: 18 January 2016

            Permissions

            Request permissions about this article.

            Request Permissions

            Check for updates

            Qualifiers

            • research-article

            Acceptance Rates

            Overall Acceptance Rate14of28submissions,50%

          PDF Format

          View or Download as a PDF file.

          PDF

          eReader

          View online with eReader.

          eReader