Ming Ming Wong
Anupam Chattopadhyay
ABSTRACT
Security is evolving fast as the prime design concern for modern System-on-Chip (SoC), especially for lightweight design choices. In this manuscript, we study the design of memory protection unit (MPU) that will be integrated in RISC-V trusted SoC, with the intention of achieving lightweight, yet robust countermeasure towards the known attack vectors. The proposed framework provides integrity, confidentiality and also allows the flexibility of partial encryption based on the application requirements. We extensively benchmarked with state-of-the-art works in secure memory design. Our design obtains least storage overhead among the ones reported so far.
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Index Terms
- SMARTS: secure memory assurance of RISC-V trusted SoC
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