Bo-Yi Yu
ABSTRACT
With the dramatically increase of design complexity and the advance of semiconductor technology nodes, huge difficulties appear during design for manufacturability with existing lithography solutions. Sub-resolution assist feature (SRAF) insertion and optical proximity correction (OPC) are both inevitable resolution enhancement techniques (RET) to maximize process window and ensure feature printability. Conventional model-based SRAF insertion and OPC methods are widely applied in industrial application but suffer from the extremely long runtime due to iterative optimization process. In this paper, we propose the first work developing a deep learning framework to simultaneously perform SRAF insertion and edge-based OPC. In addition, to make the optimized masks more reliable and convincing for industrial application, we employ a commercial lithography simulation tool to consider the quality of wafer image with various lithographic metrics. The effectiveness and efficiency of the proposed framework are demonstrated in experimental results, which also show the success of machine learning-based lithography optimization techniques for the current complex and large-scale circuit layouts.
- M. Abadi, P. Barham, J. Chen, Z. Chen, A. Davis, J. Dean et al., "TensorFlow: A system for large-scale machine learning," in Proc. OSDI, pp. 265âĂŞ283, 2016. Google Scholar
Digital Library
- Kuan-Jung Chen, Yu-Kai Chuang, Bo-Yi Yu and Shao-Yun Fang, "Minimizing cluster number with clip shifting in hotspot pattern classification," 2017 Design Automation Conference (DAC), pp. 1--6, 2017. Google ScholarDigital Library
- N. Cobb, "Fast optical and process proximity correction algorithm for integrated circuit manufacturing," Ph.D. dissertation, University of California at Berkeley, 1998. Google ScholarDigital Library
- F. Lie, C. Y. Huang, C. S. Wu, K. T. Chen and H. F. Kuo, "Demonstration of ACO-Based Freeform Source for ArF Laser Immersion Lithography System," in IEEE Access, vol. 5, pp. 6421--6428, 2017.Google Scholar
- A. H. Gabor, J. A. Bruce, W. Chu, R. A. Ferguson, C. A. Fonseca, R. L. Gordon, K. R. Jantzen, M. Khare, M. A. Lavin, W. Lee, L. W. Liebmann, K. P. Muller, J. H. Rankin, P. Varekamp, and F. X. Zach, "Subresolution assist feature implementation for high-performance logic gate-level lithography," in Proceedings of SPIE, vol. 4691, pp. 418--425, 2002.Google Scholar
- A. Gu and A. Zakhor, "Optical proximity correction with linear regression," IEEE Transactions on Semiconductor Manufacturing, vol. 21, no. 2, pp. 263--271, 2008.Google ScholarCross Ref
- Haoyu Yang, Shuhe Li, Yuzhe Ma, Bei Yu and Evangeline F. Y. Young, "GAN-OPC: Mask Optimization with Lithography-guided Generative Adversarial Nets," 2018 Design Automation Conference (DAC), Article No. 131, 2018. Google ScholarDigital Library
- S.-K. Kim, "Model-based OPC for resist reflow process," Digest of Papers Microprocesses and Nanotechnology, pp. 18--19, 2005.Google Scholar
- R. Luo, "Optical proximity correction using a multilayer perceptron neural network," Journal of Optics, vol. 15, no. 7, 2013.Google ScholarCross Ref
- X. Ma and Y. Li, "Resolution enhancement optimization methods in optical lithography with improved manufacturability," Journal of Micro/Nanolithography, MEMS, and MOEMS, vol. 10, no. 2, 2011.Google Scholar
- X. Ma, B. Wu, Z. Song, S. Jiang, and Y, Li, "Fast pixel-based optical proximity correction based on nonparametric kernel regression," Journal of Micro/Nanolithography, MEMS, and MOEMS, vol. 13, no. 4, 2014.Google Scholar
- T. Matsunawa, B. Yu, D. Z. Pan, "Optical proximity correction with hierarchical bayes model," in Proceedings of SPIE, 2013.Google Scholar
- O. W. Otto, J. G. Garofalo, K. K. Low, C.-M. Yuan, R. C. Henderson, C. Pierrat, R. L. Kostelak, S. Vaidya, P. K. Vasudev, "Automated optical proximity correction: a rules-based approach," in Proceedings of SPIE, 1994.Google Scholar
- J.-S. Park, C.-H. Park, S.-U. Rhie, Y.-H. Kim, M.-H. Yoo, J.-T Kong, H.-W. Kim, and S.-I. Yoo, "An efficient rule-based OPC approach using a DRC tool for 0.18 Îijm ASIC," in Proceedings IEEE International Symposium on Quality Electronic Design, 2000. Google ScholarDigital Library
- Y. Ping et al., "Process window enhancement using advanced RET techniques for 20nm contact layer," in Proceedings of SPIE, Art. no. 90521N, 2014.Google Scholar
- J. Schmidhuber. "Deep Learning in Neural Networks: An Overview. Neural Networks," Volume 61, Pages 85--117, January 2015. Google ScholarDigital Library
- Y.-H. Su, Y.-C. Huang, L.-C. Tsai, Y.-W. Chang, and S. Banerjee, "Fast lithographic mask optimization considering process variation," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 35, no. 8, pp. 1345--1357, 2016. Google ScholarDigital Library
- A. K. Wong, "Resolution enhancement techniques in optical lithography," in Proceedings of SPIE, 2001.Google Scholar
- L. Yin, C. Wang, and L. Li, "Process window tripling by optimized SRAF placement rules: AP/DFM: Advanced patterning/design for manufacturability," in Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC), 2016.Google Scholar
- X. Xu, Y, Lin, M. Li, T. Matsunawa, S. Nojima, C. Kodama, T. Kotani, and D. Z. Pan, "Sub-resolution assist feature generation with supervised data learning," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017.Google Scholar
- S. Banerjee, Z. Li, and S. R. Nassif, "ICCAD-2013 CAD contest in mask optimization and benchmark suite," in Proceedings of International Conference on Computer-Aided Design, 2013. Google ScholarDigital Library
- KLA-Tencor PROLITH user guide. https://www.kla-tencor.com/Google Scholar
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