Guorong He
Xing Huang
ABSTRACT
Recent advances in resistive synaptic devices have enabled the emergence of brain-inspired smart chips. These chips can execute complex cognitive tasks in digital signal processing precisely and efficiently using an efficient neuromorphic system. The neuromorphic synapses used in such chips, however, are very sensitive to the external environment, thereby weakening their resistance to malicious modifications such as hardware Trojans and backdoors. Accordingly, in this paper, we propose HTcatcher, a security verification technique for hardware threat detection in neuromorphic computing systems, incorporating finite state machine and feature verification simultaneously, which has never been considered in prior work. Furthermore, we propose a pseudo-random matrix verifying technique for memory optimization, which can reduce the memory overhead of the multi-dimensional features in the system significantly. Experimental results confirm that the proposed method can identify the malicious modifications in the system accurately, while reducing the memory usage by 25%-50%.
Supplemental Material
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Index Terms
- HTcatcher: Finite State Machine and Feature Verifcation for Large-scale Neuromorphic Computing Systems
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