Ramesh Radhakrishnan
ABSTRACT
State of the art Java Virtual Machines with Just-In-Time (JIT) compilers make use of advanced compiler techniques, run-time profiling and adaptive compilation to improve performance. However, these techniques for alleviating performance bottlenecks are more effective in long running workloads, such as server applications. Short running Java programs, or client workloads, spend a large fraction of their execution time in compilation instead of useful execution when run using JIT compilers. In short running Java programs, the benefits of runtime translation do not compensate for the overhead.
We propose using hardware support to perform efficient Java translation coupled with a light weight run time environment. The additional hardware performs the translation of Java bytecodes to native code, thus eliminating much of the overhead of software translation. A translate d code buffer is used to hold the translated code, enabling reuse at the byte code level. The proposed hardware can be used in any general purpose processor without degrading performance of native code. The proposed technique is extremely effective for short running client workloads. A performance improvement of 2.8 times to 7.7 times over a software interpreter is achieved. When compared to a JIT compiler all SPECjvm98 benchmarks except one show a performance improvement ranging from. 2.7 times to 5.0 times. A performance degradation (0.58 times) is observed for one benchmark which is long running. Allowing hardware translation to perform optimizations similar to JIT compilers and Java processors will execute long running programs more efficiently and provide speedups similar to that of client workloads.
- 1.F. Y. T. Lindholm, The Java Virtual Machine Specification. Addison Wesley, 1997.]] Google Scholar
Digital Library
- 2.A. Krall and R. Gra , "CACAO- a 64 bit JavaVM Just-In-time Compiler," in Concurrency: Practice and Experience, 9(11):1017-1030, 1997.]]Google ScholarCross Ref
- 3.A.-R.Adl-Tabatabai, M.Ciernaki, G.-Y.Lueh, V.M.Parikh, and J.MStichnoth, "Fast, Effective Code Generation in a Just-In-Time Java Compiler," in Proceedings of Conference onProgramming Language Design and Implementation, pp. 280-290, 1998.]] Google ScholarDigital Library
- 4.T. Cramer, R. Friedman, T. Miller, D. Seberger, R. Wilson, and M. Wolczko, " Compiling Java Just In Time ," IEEE Micro, vol. 17, pp. 36-43, May-June 1997.]] Google ScholarDigital Library
- 5.HotSpot: A New Breed of Virtual Machine, http://www.javaworld.com/jw-03-1998/jw-03- hotspot.html?030998.]]Google Scholar
- 6.T. Suganuma, T. Ogasawara, M. Takeuchi, T. Yasue, M. Kawahito, K. Ishizaki, H. Komatsu, and T. Nakatani, "Overview of the IBM Java Just-in-Time Compiler," IBM Systems Journal, vol. 39, no. 1, pp. 175-194, 2000.]] Google ScholarDigital Library
- 7.M. Burke, J.-D. Choi, S. Fink, D. Grove, M. Hind, V. Sarkar, M. Serrano, V. Sreedhar, and H. Srinivasan, "The Jalapeo Dynamic Optimizing Compiler for Java," in ACM Java Grande Conference, pp. 129-141, June 1999.]] Google ScholarDigital Library
- 8.The SPEC JVM98 Benchmarks, http://www.spec.org/osg/jvm98/.]]Google Scholar
- 9.R. Radhakrishnan, N. Vijaykrishnan, L. K. John and A. Sivasubramanium , "Architectural Issues in Java Runtime Systems," in Proceedings of the Intl. Symposium on High Performance Computer Architecture (HPCA-6), pp. 387-398, January 2000.]]Google Scholar
- 10.R. Radhakrishnan, J. Rubio, and L. John, "Characterization of Java applications at the bytecode level and at UltraSPARC-II Machine Code Level," in Proceedings of International Conference on Computer Design, October 1999.]] Google ScholarDigital Library
- 11.R. Radhakrishnan, N. Vijaykrishnan, L. K. John, A. Sivasubramaniam, J. Rubio, , and J. Sabarinathan, "Java Runtime Systems: Characterization and Architectural Implications," IEEE Transactions on Computers, pp. 131-146, Feb 2001.]] Google ScholarDigital Library
- 12.T. Shanley, Pentium Pro and Pentium II System Architecture. Addison-Wesley, 1998.]] Google ScholarDigital Library
- 13.E. Debaere and J. Campenhout, Interpretation and Instruction Path Coprocessing. MIT Press, 1990.]] Google ScholarDigital Library
- 14.Y. Chou and J. P. Shen, "Instruction Path Coprocessors," in Proceedings of the 27th Annual International Symposium on Computer Architecture, pp. 270-281, June 2000.]] Google ScholarDigital Library
- 15.J. E. Smith, " Decoupled Access/Execute Computer Architecture," in ACM Transactions on Computer Systems, pp. 289-308, November 1984.]] Google ScholarDigital Library
- 16.Robert F. Cmelik and David Keppel, "Shade: A Fast Instruction-Set Simulator for Execution Profiling, SMLI TR-93-12," tech. rep., Sun Microsystems Inc, 1993.]] Google ScholarDigital Library
- 17.A. Silbey, V. Milutinovic, and V. Mendoza-Grado, "A Survey of Advanced Microprocessors and Hll Computer Architectures," vol. 19, pp. 72-85, 1986.]] Google ScholarDigital Library
- 18.M. J. Flynn and L. W. Hoevel, "Execution Architecture: The Deltran Experiment," vol. C-32, pp. 156-175, 1983.]]Google Scholar
- 19.G. J. Sussman, J. Holloway, J. lxx Steel, and A. Bell, "Scheme-79 Lisp on a Chip," vol. 14, pp. 10-21, 1981.]]Google Scholar
- 20.J. Michael O'Connor and M. Tremblay, "Picojava-I: The Java Virtual Machine in Hardware," IEEE-MICRO, vol. 17, pp. 45-53, Mar/Apr 1997.]] Google ScholarDigital Library
- 21.A. Wolfe, "First Java-specific chip takes wing ," Electronic Engineering Times, 22 April 1997. http://www.techweb.com/.]]Google Scholar
- 22.R. B. Slack, "A Java chip available now," Gamelans Java Journal, April 1999. http://softwaredev.earthweb.com/java.]]Google Scholar
- 23.N.Vijaykrishnan, N.Ranganathan, and R.Gadekarla, "Object-Oriented Architectural Support for a Java Processor," in Proceedings of ECOOP'98, the 12th European Conference onObject-Oriented Programming, pp. 330-354, 1998.]] Google ScholarDigital Library
- 24.N.Vijaykrishnan, Issues in the Design of a Processor Architecture. PhD thesis, University of South Florida, 1998.]]Google Scholar
- 25.N. Vijaykrishnan and N. Ranganathan, "Tuning Branch Predictors to Support Virtual Method Invocation in Java," in Proc. of COOTS'99, pp. 217-228, May 1999.]] Google ScholarDigital Library
- 26.J. Glossner and S. Vassiliadis, "The Delft-Java Engine: An Introduction," in Proceedings of the Third International Euro-Par Conference (Euro-Par'97 Parallel Processing), pp. 766-770, August 1997.]] Google ScholarDigital Library
- 27.J. Glossner and S. Vassiliadis, "Delft-Java Link Translation Buffer," in Proceedings of the 24th EUROMICRO conference (EuroMicro 98), pp. 221-228, August 1998.]] Google ScholarDigital Library
- 28.M. Tremblay, "An Architecture for the New Millenium," in Proceedings of Hot Chips 11, August 1999.]]Google Scholar
- 29.H. Shiffman, "JSTAR: Practical Java Acceleration For Information Appliances." http://www.nazomi.com/.]]Google Scholar
- 30.Chicory Systems, "A Comparison of Java Acceleration Technologies." White Paper, Dec 2000.]]Google Scholar
- 31.K. B. Kent and M. Serra, "Hardware/Software Co-Design of a Java Virtual Machine," in Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), June 2000.]] Google ScholarDigital Library
Index Terms
- Improving Java performance using hardware translation
Recommendations
Java bytecode to native code translation: the caffeine prototype and preliminary results
MICRO 29: Proceedings of the 29th annual ACM/IEEE international symposium on MicroarchitectureThe Java bytecode language is emerging as a software distribution standard. With major vendors committed to porting the Java run-time environment to their platforms, programs in Java bytecode are expected to run without modification on multiple ...
Techniques for obtaining high performance in Java programs
This survey describes research directions in techniques to improve the performance of programs written in the Java programming language. The standard technique for Java execution is interpretation, which provides for extensive portability of programs. A ...
Comments