An Activity Monitor for Power/Performance Tuning of CMOS Digital Circuits
The requirement to control each possible degree of freedom of digital circuits becomes a necessity in deep submicron technologies. This requires getting a set of monitors to measure each one of the parameters of interest. This paper describes a monitor fabricated in a 90 nm CMOS technology that is able to estimate circuit activity. The output of such monitor can be used as a tool to decide how to adjust the circuit's working conditions to get the best power/performance response. The paper presents the implementation and experimental results of a test chip including such monitor.
Keywords: ACTIVITY; CMOS MONITORS; POWER CONSUMPTION
Document Type: Research Article
Publication date: 01 April 2006
- The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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