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Inter-Plane Communication Methods for 3-D ICs

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Three-dimensional (3-D) integration is an emerging candidate for implementing high performance multifunctional systems-on-chip. Employing an efficient medium for data communication among different planes is a key factor in achieving a high performance 3-D system. Through Silicon Vias (TSVs) provide high bandwidth, high density inter-plane links while facilitating the flow of heat in 3-D circuits. This paper provides an overview of the diverse applications of TSVs within 3-D circuits and surveys the manufacturing and design challenges relating to these interconnects. Inter-plane communication through AC-coupled on-chip inductors is also discussed as an alternative to TSVs. Although there have been several efforts that model the electrical characteristics of these inter-plane communication schemes, the effect that heat can have on the performance of the inter-plane link implemented with either means has not sufficiently been investigated. Consequently, some insight on the effects of thermal gradients on the performance of these links is offered. Results indicate that the electrical performance of TSV is not susceptible to temperature variations. Signal integrity can, however, be degraded in the case of pronounced thermal gradients in contactless 3-D ICs, as demonstrated by a decay of the S-parameters for the investigated inductive links.

Keywords: 3-D INTEGRATION; INDUCTIVE LINKS; TEMPERATURE GRADIENT; THROUGH SILICON VIA

Document Type: Research Article

Publication date: 01 April 2012

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  • The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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