Improvement of Performance of Dynamically Reconfigurable Switched Capacitor Based Non-Overlap Rotational Time Interleaved Embedded DC–DC Converter

In this paper, improvement of different performance parameters of the existing dynamically reconfigurable, Non-overlap Rotational Time Interleaved (NRTI) switched–capacitor (S-C) based embedded DC–DC converter are presented. Existing dynamically reconfigurable converter can generate three different fractions (viz., 1/3, 1/2 and 2/3) of its input supply (Vdd) and it has a feature to extend the load current range to higher limit But at the same time the power efficiency is poor in low load current regime since the switching frequency of the converter is fixed. In this paper the power efficiency of the converter is improved by using Hybrid Control Regulation. Unlike existing current control regulation the significant efficiency improvement is achieved in low load current regime with this hybrid or mixed control regulation scheme. The proposed architecture is simulated in 0.18 μm CMOS process using dual oxide transistors to demonstrate the importance of the proposed hybrid regulation scheme. The input supply voltage is 3.3 V and the regulated output range is 0.8 V to 1.85 V. Total flying capacitor and load capacitor of 330 pF and 50 pF are used, respectively. Its achieved peak power efficiency is 81.71%. The maximum delivered load power is of 32.18 mW when the target output voltage is at 1.35 V whereas maximum attainable load current is of 35.58 mA at the target output voltage of 800 mV. The improvement of power efficiency in low load current regime is achieved by using hybrid regulation.