Implementation of an Asynchronous Low-Power Small-Area Passive Radio Frequency Identification Design Using Synchronous Tools for Automation Applications

Passive Radio Frequency Identification (RFID) has become a key technology for automation systems in recent times as it ensures automatic, accurate and real-time information tracking and management. Passive RFID tags are not battery operated and hence are powered by the harvested RF signal from the interrogating reader. Such tags need power of the order of μW to execute simple functions over very short distances. Hence the microchip design of a tag for low power assumes a critical significance in determining the read range of a passive tag. This paper proposes a smallarea low-power passive RFID design that is entirely asynchronous, i.e., no global explicit clock is used. In this paper, a high-level design flow is introduced to implement an asynchronous RFID custom logic chip using synchronous computer-aided design (CAD) tools. The power consumption of the proposed design is about 26% lower and its area is 30% lesser when compared to an existing passive RFID custom logic chip for the same data rate using the same technology and libraries.