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Automation of Switch Insertion and Power Network Generation in 28 nm Power-Switched Designs

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Market competition drives design complexity higher and design cycle shorter resulting in rapid RTL and physical design changes through tape-out. Conventional switched power grid creation requires costly manual intervention to build and verify a complex switched power network. This manual effort often must be repeated for each iteration of the design and, consequently, becomes a bottleneck in complex power-managed design execution. We have developed an automated flow to accomplish the power switch insertion and power network generation leveraging Cadence Encounter (EDI) low-power capabilities. Our correct-by-construction flow cuts the switch and power network creation and validation cycle from days to minutes. It is developed for high-performance, multi-core production designs in 28 nm technology. This paper describes the design flow methodology as well as the challenges faced and our solutions.

Keywords: DESIGN FLOW; LOW-POWER; POWER SWITCH INSERTION; POWER-GATING DESIGN; POWER-SHUTOFF; POWER-SWITCHED

Document Type: Research Article

Publication date: 01 December 2012

More about this publication?
  • The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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