Energy Efficient Array Computations Using Loop Unrolling with Partial Gray Code Sequence

This paper introduces the translation of a loop with array computation to its loop unrolled version with partial Gray code sequence. This software technique reduces switching activity as well as energy consumption on the address bus of on-chip data memory, which is independent of process technology parameters. Loop unrolling with partial Gray code sequence is suitable for array computations where there are sequential access of array elements, which allows to reschedule the access of array elements in a Gray coded sequence of their addresses, in each iteration of the unrolled loop. The proposed scheme is only applicable to the Harvard Architecture. The expressions for energy consumed on the address bus of the on-chip data memory due to switching activity are derived for both unrolled loop with and without partial Gray code sequence. The proposed translation method finds a relocatable base address of the array so that the partial Gray code sequence is maintained, without any energy-performance overhead and achieves a considerable amount of energy reduction without any performance loss. Array unification is introduced for multiple arrays taking part in computation within a loop. An algorithm that performs array unification and translation of the loop with multiple arrays to its loop unrolled version with partial Gray code sequence has been proposed. The efficacy of the proposed approach is evaluated on five sample programs and ten benchmark programs. 10–93% reduction in switching activity and 10–94% reduction in energy dissipated on the address bus of on-chip data memory have been achieved.