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Low-Power Perceptron Branch Predictor

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Branch predictors relying on neural networks have received increasing attention in recent years. Unfortunately, such designs are often impractical as they come with high latency and power dissipation. In this work we introduce a low-power perceptron predictor which utilizes as much resources as needed according to the branch behavior, effectively reducing overall number of computations. We reduce predictor energy consumption by not assigning computation resources to unnecessary computations. While reducing predictor energy consumption, we also improve overall performance as we reduce prediction latency. We reduce the predictor computational power dissipation up to 34% while improving the processor performance by up to 19%.

Keywords: BRANCH PREDICTION; PERCEPTRON; POWER-AWARE DESIGN

Document Type: Research Article

Publication date: 01 December 2006

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  • The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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