Exploring Very Low-Energy Logic: A Case Study
This paper shows leakage as a limit to the effectiveness of voltage scaling as a means of reducing the energy per operation in a digital circuit. Methods of decreasing operational or dynamic leakage are then discussed. The design and simulation results of a sense amplifier-based pass transistor logic (SAPTL) circuit topology as a low leakage and low energy alternative is presented and then compared to standard static 90-nm CMOS implementations.
Keywords: 90-NM CMOS; BODY BIAS; LEAKAGE CURRENT; PASS TRANSISTORS; SELF-TIMED CIRCUITS; STACK EFFECT
Document Type: Research Article
Publication date: 01 December 2007
- The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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