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Computation Partitioning and Reuse for Power Efficient High Performance Digital Signal Processing

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The increasingly high demand of multimedia and portable electronics has necessitated the development of power efficient signal processing techniques. In this paper, we propose "computation partitioning and reuse" as an effective method for low power, high performance signal processing architectures. We show that two frequently used signal processing applications, Discrete Cosine Transform (DCT) and Finite Impulse Response (FIR) filters can obtain extremely high performance while satisfying the lower power criteria (compared to existing popular implementations) by adopting this technique. Additionally, it is often observed that in DSP systems a minor degradation in output quality (such as streaming video, image, etc.) can be tolerated since it is related to human perception. We use this concept to design architectures where power requirements can be further optimized by performing tradeoffs of energy requirements with output quality. We propose two techniques for DCT—(1) preferential computation of critical outputs, and (2) bitwidth adaptation to provide large power savings while maintaining system frequency requirements.

Keywords: COMPUTATION PARTITIONING; DIGITAL SIGNAL PROCESSING; ENERGY-QUALITY TRADEOFFS; HIGH PERFORMANCE; LOW POWER

Document Type: Research Article

Publication date: 01 December 2007

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  • The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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