Low-Power Heterogeneous Systems-on-Chips
The design of heterogeneous Systems-on-Chips (SoC) in very deep submicron technologies becomes a very complex task that has to bridge very high level system description with low-level considerations due to technology defaults and variations and increasing system and circuit complexity. This paper describes the major low-level issues, such as dynamic and static power consumption, temperature, technology variations, interconnect, DFM, reliability and yield, and their impact on high-level design, such as the design of multi-Vdd, fault-tolerant, redundant or adaptive chip architectures. Some multi-processor based SoC (MPSoC) cases are also presented in three domains in which heterogeneity is large: wireless sensor networks, vision sensors and mobile TV. These examples also highlight the heterogeneous nature and the increasing complexity at circuit-level, with the extension from CMOS-only SoCs towards MEMS-and-CMOS SoCs.
Keywords: DSP PROCESSORS; EMBEDDED PROCESSORS; HETEROGENEOUS; LEAKAGE; MEMS; MOBILE TV; MPSOC; MULTI-PROCESSOR; RF; SOC; TECHNOLOGY VARIATIONS; VISION SENSORS; WIRELESS SENSOR NETWORKS
Document Type: Research Article
Publication date: 01 August 2008
- The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
- Editorial Board
- Information for Authors
- Subscribe to this Title
- Terms & Conditions
- Ingenta Connect is not responsible for the content or availability of external websites
- Access Key
- Free content
- Partial Free content
- New content
- Open access content
- Partial Open access content
- Subscribed content
- Partial Subscribed content
- Free trial content