Low-Power Coding for Networks-on-Chip with Virtual Channels
Power consumption represents a major concern for Networks-on-Chip (NoC). In order to provide quality-of-service to such NoCs, Virtual Channels are normally used. A drawback of the approach is the increased power consumption because of the suppression of correlation between consecutive flits. This work proposes a low-power coding approach to overcome the aforementioned problem. The technique requires a minimum overhead, while obtaining a significant power reduction. Exhaustive experimental simulations are provided to demonstrate the advantages of the proposed architecture.
Keywords: LOW-POWER CODING; NETWORK-ON-CHIP; VIRTUAL CHANNEL
Document Type: Research Article
Publication date: 01 April 2009
- The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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