Gate Driver Voltage Optimization for Multi-Mode Low Power DC–DC Conversion
In this paper we propose an optimization method for low power, high-efficiency DC–DC conversion. A detailed analysis of a multi-mode Step-Down (or Buck) converter losses is presented, allowing the comparison of the power MOS channel conduction losses with their gate-driving losses in order to find the optimum gate-driving voltage that maximizes the converter's efficiency. It is shown that the gate-voltage controller can be simplified to a unique voltage value applied below a determined output current, while still achieving efficiencies over 90% at output currents as low as 10 mA. Simulation results of a 600 mA, 2 MHz, Buck commercial converter, implemented in a 65 nm technology are presented validating the developed models and control methodology. A low power (<20 uW) simple adaptive timing circuit is proposed to efficiently implement the gate-voltage controller with low complexity, low die area (0.007 mm2), and low quiescent current consumption (<2.4 uA).
Keywords: BUCK; HIGH-EFFICIENCY; LIGHT-LOAD EFFICIENCY; LOW POWER DC–DC CONVERSION; LOW VOLTAGE SWING; STEP-DOWN
Document Type: Research Article
Publication date: 01 August 2009
- The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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