Automatic Design of Low-Power Low-Voltage Analog Circuits Using Particle Swarm Optimization with Re-Initialization

In this paper, we present application and effectiveness of Particle Swarm Optimization (PSO) for automatic sizing of analog circuits. An efficient re-initialization strategy is introduced to improve the performance of PSO Algorithm (referred as PSO-R). Four benchmark circuits, namely, (i) CMOS buffer chain, (ii) two-stage CMOS operational amplifier (op-amp), (iii) high-gain low-power low-voltage three-stage CMOS op-amp, and (iv) a recently reported ultra-low-power ultra-low-voltage CMOS Miller operational transconductance amplifier (OTA), are automatically designed using the PSO-R algorithm. For the purpose of comparison, these circuits are also designed using PSO, Hierarchical PSO (HPSO), and Genetic Algorithm (GA). Various CMOS technologies ranging from 0.35 m down to 0.13 m are used. PVT (process, voltage, and temperature) variations are taken into account and Spectre tool is used for circuit simulations. The PSO-R algorithm converges to a better solution compared to other algorithms for multiple design trials of various low-power low-voltage op-amp designs. For CMOS ultra-low-power ultra-low-voltage Miller OTA, even performance of the circuit designed by the PSO-R algorithm is better than that of recently reported manual design of the same circuit. For future ultra-low-voltage applications, this OTA is also designed in 0.4 V supply voltage. This 0.4 V OTA gives a DC gain of 75 dB, unity gain frequency of 50 MHZ, and dissipates a power of 550 nW. For this design, PSO-R algorithm has taken 19 minutes of CPU time on average on a Sun system with 1.2 GHz dual core processor and 8 GB RAM.