An Efficient Energy Estimation Methodology for Quasi Delay Insensitive Template-Based Asynchronous Circuits

As asynchronous circuits gain popularity due to their potential advantages, the lack of an evaluation framework for these circuits is highlighted. In this paper we analyze the energy consumption of a well known family of asynchronous circuits and present a new efficient methodology for energy estimation of these circuits using pre-synthesized modeling. Energy estimation at high-level is performed by simulating the intermediate format of the design. This format consists of concurrent processes handshaking with each other. The number of Read and Write accesses on the ports during the handshake of these concurrent processes are counted by analyzing this intermediate format using simulation as the base of our estimation methodology. To verify the accuracy of our presented method, we applied it to a Reed-Solomon decoder as our benchmark. The results show around 10% imprecision in comparison with the energy measurements made by SPICE, while simulation speed of the proposed scheme is faster than usual post-synthesis energy estimation methods by an order of 8.