RF Module Design of Passive UHF RFID Tag Implemented in CMOS 90-nm Technology
This paper presents the circuit design and the experimental results of RF module of a passive UHF EPC C1G2 compatible RFID tag implemented in a 90-nm CMOS technology, in attempt to reduce cost and power consumption. The discussion is focused on the rectifier, voltage regulator, ASK demodulator, ASK modulator, clock generator and baseband processor, with emphases on challenges and utilized approaches under nano-scale process technology. The implemented RFID tag IC has an area of 1800 m × 1200 m, with minimum received power of 22.7 W.
Keywords: CMOS 90-NM TECHNOLOGY; PASSIVE UHF RFID TAGS
Document Type: Research Article
Publication date: 01 April 2010
- The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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