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POWER-SIM: An SOC Simulator for Estimating Power Profiles of Mobile Workloads

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The power consumption of complex System-On-Chips (SOCs) heavily depends on application profile and usage patterns. Customization of power management strategies based on application as well as user profile has great promise towards minimizing the power wastage. In this paper, we present a methodology for computing the power usage at a higher level of granularity for analyzing the scope of the optimization of the power management strategies in a complex low power SOC with respect to given workload profiles by customizing the boundaries of power domains. The proposed methodology computes the power usage for a given SOC and a given power domain partitioning. We have implemented the methodology using System Verilog platform as well as using JAVA platform and discuss the relative merits of each platform. We demonstrate the effect of user profiles along with other major factors like task mapping etc. on the partitioning strategy through a case study.

Keywords: POWER DOMAIN PARTITIONING; POWER PROFILING; SIMULATION; SOC; WORKLOAD

Document Type: Research Article

Publication date: 01 June 2012

More about this publication?
  • The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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