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An Asynchronous Advanced Encryption Standard Core Design for Energy Efficiency

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In the age of mobile computing, system constraints require low power, robust circuits capable of operating at inconsistent supply voltages while maintaining low energy per operation. In this paper, an asynchronous Advanced Encryption Standard core designed for robust low power operation is presented. The core uses a self-timed paradigm, named Multi-Threshold NULL Convention Logic. In pursuit of low power, an efficient, low-area Advanced Encryption Standard architecture was selected. The asynchronous design is compared to a synchronous baseline design in terms of size, energy per operation, average active power, leakage power, and supply voltage scaling. The results show the asynchronous design is smaller, more energy efficient, and capable of operating over a wider voltage range.

Keywords: AES; LOW POWER; MTCMOS; NULL CONVENTION LOGIC; SELF-TIMED ASYNCHRONOUS LOGIC

Document Type: Research Article

Publication date: 01 August 2013

More about this publication?
  • The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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