Junctionless Tunnel Field Effect Transistor with Enhanced Performance Using III–V Semiconductor
In this paper, the performance of a double gate Junctionless Tunnel Field Effect Transistor has been enhanced with very decent characteristics using a ternary III–V semiconductor compound. This device has a uniform channel of In1–x
Al
x
Sb
which is heavily n-type doped. The simulations are performed for various Al mole fractions and different dielectric constants of gate oxide. The results show the commendable point sub-threshold slope (∼8.5 mV/decade), average sub-threshold slope (∼9 mV/decade), I
ON(∼3.5
mA), I
ON/IOFF ratio (∼2 × 1015) at room temperature. The performance reflects that III–V semiconductor compounds have immense purview for low power applications.
Keywords: DOUBLE GATE JUNCTIONLESS TUNNEL FIELD EFFECT TRANSISTOR (DG JL-TFET); SUB-THRESHOLD SLOPE (SS)
Document Type: Research Article
Publication date: 01 December 2013
- The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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