Selective Algorithms for Built-In Self-Test and Self-Diagnosis in Embedded SRAMS
Memories are one of the most universal cores that are embedded into almost all system on chips (SoCs). Finding cost effective test solution for embedded memories is paramount. Industries are still improving the existing low cost memory test solutions which can support current technologies
and advanced SoC architectures. This paper presents a programmable built-in self-diagnosis (PBISD) methodology with self-test for embedded SRAMs. The BISD logic adapts the test controller with micro code encoding technique in order to control the test operation sequences for fault detection.
It also encompasses a diagnosis array in order to locate the fault sites. The macro codes are used to select any of seven MARCH algorithms, and detect different faults of the memory under test (MUT). This BISD supports the test, diagnosis and normal operation modes. The experimental results
show that this work gives 17–47% improved area overhead and 16–41% enhanced speed compared to three published results.
Keywords: ALGORITHMS; DIAGNOSIS; MARCH; SELF-TEST; TESTING
Document Type: Research Article
Publication date: 01 December 2015
- The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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