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PoETE: A Method to Design Temperature-Aware Integrated Systems

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Avoiding thermal hotspots and large temperature gradients are the ultimate design goals for the new generation of systems on chip. Monitoring the system's behavior allows Dynamic Thermal Management (DTM) techniques to prevent critical temperatures, and therefore enhance design reliability, reduce the energy consumption, and increase the chip lifetime. This paper addresses the self-awareness for the chip temperature monitoring. A cost-effective method is presented for the ondie thermal sensor placement in order to provide estimations at run-time of the overall chip thermal behavior. The proposed algorithms systematically choose the best trade-off between accuracy and overhead. The surface of the chip is decomposed into several thermally homogeneous regions. A case-study experiment shows the accuracy of our method compared to the related works.

Keywords: CLUSTERING; DESIGN TIME; SENSORS ALLOCATION; THERMAL MANAGEMENT

Document Type: Research Article

Publication date: 01 March 2018

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  • The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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