IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Regular Section
An Unassisted Low-Voltage-Trigger ESD Protection Structure in a 0.18-µm CMOS Process without Extra Process Cost
Bing LIYi SHAN
Author information
JOURNAL RESTRICTED ACCESS

2010 Volume E93.C Issue 8 Pages 1359-1364

Details
Abstract

In order to quickly discharge the electrostatic discharge (ESD) energy, an unassisted low-voltage-trigger ESD protection structure is proposed in this work. Under transmission line pulsing (TLP) stress, the trigger voltage, turn-on speed and second breakdown current can be obviously improved, as compared with the traditional protection structure. Moreover there is no need to add any extra mask or do any process modification for the new structure. The proposed structure has been verified in foundry's 0.18-µm CMOS process.

Content from these authors
© 2010 The Institute of Electronics, Information and Communication Engineers
Previous article Next article
feedback
Top