IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Regular Section
An Analysis and Design Methodology of Resistor-Based Phase Error Averaging for Multiphase Generation
Young-Sang KIMYunjae SUHHong-June PARKJae-Yoon SIM
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2010 Volume E93.C Issue 12 Pages 1662-1669

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Abstract

This paper presents a quantitative analysis and design methodology of resistor-based phase error averaging scheme for precise multiphase generation. Unlike the previously reported works stating that more averaging simply achieves better linearity, the proposed analysis leads to the existence of the optimum number of averaging contributions by including the effect of the signal transition time. The developed model shows a good agreement with a Monte-Carlo circuit simulation. A test PLL with a 32-phase two-dimensional ring VCO, implemented in a 0.18µm CMOS, generates monotonous 32 phases with the best linearity performance, showing an INL of +0.27/-1.0 LSB and a DNL of +0.37/-0.27 LSB at 1.2GHz, and an INL of +0.23/-1.57 LSB and a DNL of +0.44/-0.44 LSB at 1.6GHz.

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© 2010 The Institute of Electronics, Information and Communication Engineers
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