IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Special Section on Analog Circuits and Related SoC Integration Technologies
Measurement of Integrated PA-to-LNA Isolation on Si CMOS Chip
Ryo MINAMIJeeYoung HONGKenichi OKADAAkira MATSUZAWA
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2011 Volume E94.C Issue 6 Pages 1057-1060

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Abstract

This paper presents measurement of on-chip coupling between PA and LNA integrated on Si CMOS substrate, which is caused by substrate coupling, magnetic coupling, power-line coupling, etc. These components are decomposed by measurements using diced chips. The result reveals that the substrate coupling is the most dominant in CMOS chips and the total isolation becomes less than -50dB with more than 0.4mm PA-to-LNA distance.

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© 2011 The Institute of Electronics, Information and Communication Engineers
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