A Fundamental Analysis of Single Event Effects on Clocked CVSL Circuits with Gated Feedback

Hiroshi HATANO

doi:10.1587/transele.E94.C.1131

IEICE Transactions on Electronics

Online ISSN : 1745-1353
Print ISSN : 0916-8524

Regular Section

A Fundamental Analysis of Single Event Effects on Clocked CVSL Circuits with Gated Feedback

Hiroshi HATANO

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Keywords: cascade voltage switch logic, single event effect, exclusive-OR, radiation, simulation

JOURNAL RESTRICTED ACCESS

2011 Volume E94.C Issue 6 Pages 1131-1134

DOI https://doi.org/10.1587/transele.E94.C.1131

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Abstract

Clocked cascade voltage switch logic (C²VSL) circuits with gated feedback were newly designed for synchronous systems. In order to investigate single event transient (SET) effects on the C²VSL circuits, SET effects on C²VSL EX-OR circuits were analyzed using SPICE. Simulation results have indicated that the C²VSL have increased tolerance to SET.

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