On-Chip In-Place Measurements of Vth and Signal/Substrate Response of Differential Pair Transistors

Yoji BANDO; Satoshi TAKAYA; Toru OHKAWA; Toshiharu TAKARAMOTO; Toshio YAMADA; Masaaki SOUDA; Shigetaka KUMASHIRO; Tohru MOGAMI; Makoto NAGATA

doi:10.1587/transele.E95.C.137

Regular Section

On-Chip In-Place Measurements of V_th and Signal/Substrate Response of Differential Pair Transistors

Yoji BANDO, Satoshi TAKAYA, Toru OHKAWA, Toshiharu TAKARAMOTO, Toshio YAMADA, Masaaki SOUDA, Shigetaka KUMASHIRO, Tohru MOGAMI, Makoto NAGATA

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Keywords: on-chip monitor, substrate noise, differential amplifier

JOURNAL RESTRICTED ACCESS

2012 Volume E95.C Issue 1 Pages 137-145

DOI https://doi.org/10.1587/transele.E95.C.137

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Abstract

In-place AC measurements of the signal gain and substrate sensitivity of differential pair transistors of an analog amplifier are combined with DC characterization of the threshold voltage (V_th) of the same transistors. An on-chip continuous time waveform monitoring technique enables in-place matrix measurements of differential pair transistors with a variety of channel sizes and geometry, allowing the wide coverage of experiments about the transistor-level physical layout dependency of substrate noise response. A prototype test structure uses a 90-nm CMOS technology and demonstrates the geometry-dependent variation of substrate sensitivity of transistors in operation.

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