IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Regular Section
A CMOS SRAM Test Cell Design Using Selectively Metal-Covered Transistors for a Laser Irradiation Failure Analysis
Hiroshi HATANO
Author information
JOURNAL RESTRICTED ACCESS

2012 Volume E95.C Issue 11 Pages 1827-1829

Details
Abstract

A laser irradiation experiment for photocurrent induced failure investigations was described. In order to focus a laser beam on a desired transistor, novel test circuit structures using selectively metal-covered transistors were proposed. Photocurrent induced upset failures were successfully observed in fabricated CMOS SRAM test cells. Results were discussed with SPICE simulations.

Content from these authors
© 2012 The Institute of Electronics, Information and Communication Engineers
Previous article Next article
feedback
Top