In this paper, we report the reduction in the base-collector capacitance (C_BC) of InP/InGaAs double heterojunction bipolar transistors with buried SiO₂ wires (BG-HBT). In a previous trial, we could not confirm a clear difference between the C_BC of the conventional HBT and that of the BG-HBT because the subcollector layer was thicker than expected. In this study, the interface between the collector and the subcollector was shifted to the middle of the SiO₂ wires by adjusting the growth temperature, and a reduction in C_BC with buried SiO₂ wires was confirmed. The estimated C_BC of the BG-HBT was 7.6fF, while that of the conventional HBT was 8.6fF. This 12% reduction was in agreement with the 10% reduction calculated according to the designed size.