IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Regular Section
Improvement of Address Discharge Delay Time Using Modified Reset Waveform in AC Plasma Display Panel
Bhum Jae SHINHyung Dal PARKHeung-Sik TAE
Author information
JOURNAL RESTRICTED ACCESS

2012 Volume E95.C Issue 5 Pages 958-963

Details
Abstract

In order to improve the address discharge characteristics, we propose the modified selective reset waveform utilizing the address-bias voltage (Va-bias) during the ramp-up period. It is revealed that the proper Va-bias makes the weak discharge between the address and scan electrodes which plays a role in sufficiently removing the wall charge, thereby contributing to minimizing the wall-voltage variation during the address-period. As a result of adopting the Va-bias in the conventional selective reset driving waveform, it was found that the address discharge delay time can be shortened by approximately 40ns and the address period of each subfield can be significantly reduced by about 43µs.

Content from these authors
© 2012 The Institute of Electronics, Information and Communication Engineers
Previous article Next article
feedback
Top