IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Regular Section
Modeling of NBTI Stress Induced Hole-Trapping and Interface-State-Generation Mechanisms under a Wide Range of Bias Conditions
Chenyue MAHans Jürgen MATTAUSCHMasataka MIYAKETakahiro IIZUKAKazuya MATSUZAWASeiichiro YAMAGUCHITeruhiko HOSHIDAAkinori KINOSHITATakahiko ARAKAWAJin HEMitiko MIURA-MATTAUSCH
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2013 Volume E96.C Issue 10 Pages 1339-1347

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Abstract

A predictive compact model of p-MOSFET negative bias temperature instability (NBTI) degradation for circuit simulation is reported with unified description of the interface-state-generation and hole-trapping mechanisms. It is found that the hole-trapping is responsible for the initial stage of the stress degradation, and the interface-state generation dominates the degradation afterwards, especially under high stress conditions. The predictive compact model with 8 parameters enables to reproduce the measurement results of the NBTI degradation under a wide range of stress bias conditions. Finally, the developed NBTI model is implemented into the compact MOSFET model HiSIM for circuit degradation simiulation.

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© 2013 The Institute of Electronics, Information and Communication Engineers
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