An effective supply voltage monitor evaluates dynamic variation of (V_dd-V_ss) within power rails of integrated circuits on a die. The monitor occupies an area of as small as 10.8×14.5µm² and is followed by backend digitizing circuits, both using 3.3V thick oxide transistors in a 65nm CMOS technology for covering all power domains from core circuits to peripheral I/O rings. A prototype demonstrates capturing of effective supply voltage waveforms in digital (shift registers) as well as in analog (4bit Flash ADC) circuits.