IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Regular Section
Supporting Predictable Performance Guarantees for SMT Processors
Xin JINNingmei YUYaoyang ZHOUBowen HUANGZihao YUXusheng ZHANHuizhe WANGSa WANGYungang BAO
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2020 Volume E103.A Issue 6 Pages 806-820

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Abstract

Simultaneous multithreading (SMT) technology improves CPU throughput, but also causes unpredictable performance fluctuations for co-running workloads. Although recent major SMT processors have adopted some techniques to promote hardware support for quality-of-service (QoS), achieving both precise performance guarantees and high throughput on SMT architectures is still a challenging open problem. In this paper, we demonstrate through some comprehensive investigations on a cycle-accurate simulator that not only almost all in-core resources suffer from severe contention as workloads vary but also there is a non-linear relationship between performance and available quotas of resources. We consider these observations as the fundamental reason leading to the challenging problem above. Thus, we introduce QoSMT, a novel hardware scheme that leverages a closed-loop controlling mechanism consisting of detection, prediction and adjustment to enforce precise performance guarantees for specific targets, e.g. achieving 85%, 90% or 95% of the performance of a workload running alone respectively. We implement a prototype on GEM5 simulator. Experimental results show that the average control error is only 1.4%, 0.5% and 3.6%.

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© 2020 The Institute of Electronics, Information and Communication Engineers
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