Variation-Tolerance of a 65-nm Error-Hardened Dual-Modular-Redundancy Flip-Flop Measured by Shift-Register-Based Monitor Structures

Chikara HAMANAKA; Ryosuke YAMAMOTO; Jun FURUTA; Kanto KUBOTA; Kazutoshi KOBAYASHI; Hidetoshi ONODERA

doi:10.1587/transfun.E94.A.2669

Special Section on VLSI Design and CAD Algorithms

Variation-Tolerance of a 65-nm Error-Hardened Dual-Modular-Redundancy Flip-Flop Measured by Shift-Register-Based Monitor Structures

Chikara HAMANAKA, Ryosuke YAMAMOTO, Jun FURUTA, Kanto KUBOTA, Kazutoshi KOBAYASHI, Hidetoshi ONODERA

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Keywords: soft error, hardened design, variability, test structure, shift register

JOURNAL RESTRICTED ACCESS

2011 Volume E94.A Issue 12 Pages 2669-2675

DOI https://doi.org/10.1587/transfun.E94.A.2669

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Abstract

We show measurement results of variation-tolerance of an error-hardened dual-modular-redundancy flip-flop fabricated in a 65-nm process. The proposed error-hardened FF called BCDMR is very strong against soft errors and also robust to process variations. We propose a shift-register-based test structure to measure variations. The proposed test structure has features of constant pin count and fast measurement time. A 65nm chip was fabricated including 40k FFs to measure variations. The variations of the proposed BCDMR FF are 74% and 55% smaller than those of the conventional BISER FF on the twin-well and triple-well structures respectively.

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