Systematic experimental study on stitching techniques of CMOS image sensors

Jun Zhu; Donghua Liu; Wei Zhang; Qing Wang; Wenliang Li; Lijun Chen; Chen Li; Yuhang Zhao

doi:10.1587/elex.13.20160441

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Systematic experimental study on stitching techniques of CMOS image sensors

Jun Zhu, Donghua Liu, Wei Zhang, Qing Wang, Wenliang Li, Lijun Chen, Chen Li, Yuhang Zhao

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Keywords: CMOS Imaging Sensor (CIS), stitching technique, 12 inch, 0.055 µm CMOS process

JOURNAL FREE ACCESS

2016 Volume 13 Issue 15 Pages 20160441

DOI https://doi.org/10.1587/elex.13.20160441

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Abstract

On the basis of the systematic study of stitching techniques, a large area, 28.3 mm × 38.8 mm, 42 Mega pixels CMOS Imaging Sensor (CIS) had been demonstrated on 12 inch silicon wafer in a 0.055 µm CMOS process. By scanning a reticle across a wafer of silicon, smaller arrays can be stitched together to construct larger area sensors. Meanwhile, in order to verify the feasibility and capability of stitching, a 203 mm × 179 mm, 1.8 Billion pixels CIS was also created without any performance deficiency.

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