IEICE Transactions on Communications
Online ISSN : 1745-1345
Print ISSN : 0916-8516
Regular Section
Multi-Stage Decoding Scheme with Post-Processing for LDPC Codes to Lower the Error Floors
Beomkyu SHINHosung PARKJong-Seon NOHabong CHUNG
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2011 Volume E94.B Issue 8 Pages 2375-2377

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Abstract

In this letter, we propose a multi-stage decoding scheme with post-processing for low-density parity-check (LDPC) codes, which remedies the rapid performance degradation in the high signal-to-noise ratio (SNR) range known as error floor. In the proposed scheme, the unsuccessfully decoded words of the previous decoding stage are re-decoded by manipulating the received log-likelihood ratios (LLRs) of the properly selected variable nodes. Two effective criteria for selecting the probably erroneous variable nodes are also presented. Numerical results show that the proposed scheme can correct most of the unsuccessfully decoded words of the first stage having oscillatory behavior, which are regarded as a main cause of the error floor.

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© 2011 The Institute of Electronics, Information and Communication Engineers
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