IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Special Section on Fundamentals and Applications of Advanced Semiconductor Devices
Effect of Arrangement of Input Gates on Logic Switching Characteristics of Nanodot Array Device
Mingu JOYuki KATOMasashi ARITAYukinori ONOAkira FUJIWARAHiroshi INOKAWAYasuo TAKAHASHIJung-Bum CHOI
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2012 Volume E95.C Issue 5 Pages 865-870

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Abstract

We developed a flexible-logic-gate single-electron device (SED) in which logic functions can be selected by changing the voltage applied to the control gate. It consists of an array of nanodots with multiple inputs and multiple outputs. Since the gate electrodes couple capacitively to the many dots underneath, complicated characteristics depending on the combination of the gate voltages yield a selectable logic gate when some of the gate electrodes are used as control gates. One of the important issues is how to design the arrangement of nanodots and gate electrodes. In this study, we fabricated a Si nanodot array with two simple input gates and two output terminals, in which each gate was coupled to half of the nanodot array. Even though the device had a very simple input-gate arrangement and just one control gate, we could create a half-adder function through the use of current maps as functions of the input gate voltages. We found that the nanodots evenly coupled capacitively to both input gates played an important role in getting a basic set of logic functions. Moreover, these results guarantee that a more complicated input-gate structure, in which each gate evenly couples many nanodots, will yield more complicated functions.

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© 2012 The Institute of Electronics, Information and Communication Engineers
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