Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage

Daisuke FUJIMOTO; Noriyuki MIURA; Makoto NAGATA; Yuichi HAYASHI; Naofumi HOMMA; Takafumi AOKI; Yohei HORI; Toshihiro KATASHITA; Kazuo SAKIYAMA; Thanh-Ha LE; Julien BRINGER; Pirouz BAZARGAN-SABET; Shivam BHASIN; Jean-Luc DANGER

doi:10.1587/transele.E97.C.272

Special Section on Solid-State Circuit Design - Architecture, Circuit, Device and Design Methodology

Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage

Daisuke FUJIMOTO, Noriyuki MIURA, Makoto NAGATA, Yuichi HAYASHI, Naofumi HOMMA, Takafumi AOKI, Yohei HORI, Toshihiro KATASHITA, Kazuo SAKIYAMA, Thanh-Ha LE, Julien BRINGER, Pirouz BAZARGAN-SABET, Shivam BHASIN, Jean-Luc DANGER

Author information

Daisuke FUJIMOTO
Kobe University
Noriyuki MIURA
Kobe University
Makoto NAGATA
Kobe University
Yuichi HAYASHI
Tohoku University
Naofumi HOMMA
Tohoku University
Takafumi AOKI
Tohoku University
Yohei HORI
National Institute of Advanced Industrial Science and Technology
Toshihiro KATASHITA
National Institute of Advanced Industrial Science and Technology
Kazuo SAKIYAMA
The University of Electro-Communica-tions
Thanh-Ha LE
Morpho
Julien BRINGER
Morpho
Pirouz BAZARGAN-SABET
Pierre-and-Marie-Curie University
Shivam BHASIN
Telecom ParisTech
Jean-Luc DANGER
Telecom ParisTech

Keywords: information leakage, side-channel attack, correlation power analysis, advance encryption standard

JOURNAL RESTRICTED ACCESS

2014 Volume E97.C Issue 4 Pages 272-279

DOI https://doi.org/10.1587/transele.E97.C.272

Details

Abstract

Power supply noise waveforms within cryptographic VLSI circuits in a 65nm CMOS technology are captured by using an on-chip voltage waveform monitor (OCM). The waveforms exhibit the correlation of dynamic voltage drops to internal logical activities during Advance Encryption Standard (AES) processing, and causes side-channel information leakage regarding to secret key bytes. Correlation Power Analysis (CPA) is the method of an attack extracting such information leakage from the waveforms. The frequency components of power supply noise contributing the leakage are shown to be localized in an extremely low frequency region. The level of information leakage is strongly associated with the size of increment of dynamic voltage drops against the Hamming distance in the AES processing. The time window of significant importance where the leakage most likely happens is clearly designated within a single clock cycle in the final stage of AES processing. The on-chip power supply noise measurements unveil the facts about side-channel information leakage behind the traditional CPA with on-board sensing of power supply current through a resistor of 1 ohm.

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