IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology
Through Chip Interface Based Three-Dimensional FPGA Architecture Exploration
Li-Chung HSUMasato MOTOMURAYasuhiro TAKETadahiro KURODA
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Keywords: TCI, ThruChip, 3-D FPGA, TSV, FPGA, TPR, VPR
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2015 Volume E98.C Issue 4 Pages 288-297

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Abstract

This paper presents work on integrating wireless 3-D interconnection interface, namely ThruChip Interface (TCI), in three-dimensional field-programmable gate array (3-D FPGA) exploration tool (TPR). TCI is an emerging 3-D IC integration solution because of its advantages over cost, flexibility, reliability, comparable performance, and energy dissipation in comparison to through-silicon-via (TSV). Since the communication bandwidth of TCI is much higher than FPGA internal logic signals, in order to fully utilize its bandwidth, the time-division multiplexing (TDM) scheme is adopted. The experimental results show 25% on average and 58% at maximum path delay reduction over 2-D FPGA when five layers are used in TCI based 3-D FPGA architecture. Although the performance of TCI based 3-D FPGA architecture is 8% below that of TSV based 3-D FPGA on average, TCI based architecture can reduce active area consumed by vertical communication channels by 42% on average in comparison to TSV based architecture and hence leads to better delay and area product.

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© 2015 The Institute of Electronics, Information and Communication Engineers
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