IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Special Section on Analog Circuit Techniques and Related Topics
Technique to Improve the Performance of Time-Interleaved A-D Converters with Mismatches of Non-linearity
Koji ASAMITakahide SUZUKIHiroyuki MIYAJIMATetsuya TAURAHaruo KOBAYASHI
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2009 Volume E92.A Issue 2 Pages 374-380

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Abstract

One method for achieving high-speed waveform digitizing uses time-interleaved A-D Converters (ADCs). It is known that, in this method, using multiple ADCs enables sampling at a rate higher than the sampling rate of the ADC being used. Degradation of the dynamic range, however, results from such factors as phase error in the sampling clock applied to the ADC, and mismatched frequency characteristics among the individual ADCs. This paper describes a method for correcting these mismatches using a digital signal processing (DSP) technique for automatic test equipment applications. This method can be applied to any number of interleaved ADCs, and it does not require any additional hardware; good correction and improved accuracy can be obtained simply by adding a little to the computing overhead.

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© 2009 The Institute of Electronics, Information and Communication Engineers
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