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Discrete-time charge analysis for a digital RF charge sampling mixer

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Abstract

This paper presents an approach for analyzing the key parts of a general digital radio frequency (RF) charge sampling mixer based on discrete-time charge values. The cascade sampling and filtering stages are analyzed and expressed in theoretical formulae. The effects of a pseudo-differential structure and CMOS switch-on resistances on the transfer function are addressed in detail. The DC-gain is restrained by using the pseudo-differential structure. The transfer gain is reduced because of the charge-sharing time constant when taking CMOS switch-on resistances into account. The unfolded transfer gains of a typical digital RF charge sampling mixer are analyzed in different cases using this approach. A circuit-level model of the typical mixer is then constructed and simulated in Cadence SpectreRF to verify the results. This work informs the design of charge-sampling, infinite impulse response (IIR) filtering, and finite impulse response (FIR) filtering circuits. The discrete-time approach can also be applied to other multi-rate receiver systems based on charge sampling techniques.

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Authors and Affiliations

  1. Institute of VLSI Design, Zhejiang University, Hangzhou, 310027, China

    Yun Pan, Xiao-lang Yan & Xiao-peng Yu

  2. Department of Electronic Engineering, Tsinghua University, Beijing, 100084, China

    Ning Ge

Authors
  1. Yun Pan
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  2. Ning Ge
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  3. Xiao-lang Yan
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  4. Xiao-peng Yu
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Correspondence to Yun Pan.

Additional information

Project supported by the National Natural Science Foundation of China (No. 90407011), the National High-Tech Research and Development Program (863) of China (No. 2007AA01Z2b3), and China Postdoctoral Science Foundation (No. 20090451439)

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Pan, Y., Ge, N., Yan, Xl. et al. Discrete-time charge analysis for a digital RF charge sampling mixer. J. Zhejiang Univ. - Sci. C 11, 307–314 (2010). https://doi.org/10.1631/jzus.C0910390

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  • DOI: https://doi.org/10.1631/jzus.C0910390

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