Top > JACIII > Robustness to Bit Inversion in Registers and Acceleration of P ...

single-jc.php

JACIII Vol.15 No.8 pp. 1175-1185
doi: 10.20965/jaciii.2011.p1175
(2011)

Paper:

Views over last 60 days: 471

Robustness to Bit Inversion in Registers and Acceleration of Program Evolution in On-Board Computer

Tomohiro Harada, Masayuki Otani, Yoshihiro Ichikawa,
Kiyohiko Hattori, Hiroyuki Sato, and Keiki Takadama

The University of Electro-Communications, 3rd Floor in West-6 Building, 1-5-1 Chofugaoka, Chofu, Tokyo 182-8585, Japan

Received:
May 20, 2011
Accepted:
September 9, 2011
Published:
October 20, 2011
Creative Commons License
Keywords:
program evolution, Tierra, single-event upset, bit inversion, on-board computer, UNITEC-1
Abstract
This paper focuses on an on-board computer (OBC) that evolves computer programs through bit inversion and targets analyzing robustness against bit inversion in registers. We also propose a new method that can change the number of computer programs dynamically. Intensive experiments revealed the following: (1) Correct programs can be maintained even in bit inversion in registers in addition to bit inversion in instructions. (2) Our proposal accelerates program evolution by increasing the population size, i.e., the number of programs, within fixed memory size.
Cite this article as:
T. Harada, M. Otani, Y. Ichikawa, K. Hattori, H. Sato, and K. Takadama, “Robustness to Bit Inversion in Registers and Acceleration of Program Evolution in On-Board Computer,” J. Adv. Comput. Intell. Intell. Inform., Vol.15 No.8, pp. 1175-1185, 2011.
Data files:
References
  1. [1] Reed Business Information, “EDN Japan February issue,” EDN Japan, 2005.
  2. [2] N. Ikeda, H. Shindou, Y. Iide, H. Asai, S. Kuboyama, and S. Matsuda, “Evaluation of the Errors of Commercial Semiconductor Devices in a Space Radiation Environment,” The transactions of the Institute of Electronics, Information and Communication Engineers. B, Vol.88, No.1, pp. 108-116, 2005.
  3. [3] J. Justesen and T. Hoholdt, “A Course In Error-Correcting Codes,” European Mathematical Society, 2004.
  4. [4] Ken Nonami and Keiki Takadama, “Tierra-based Space System for Robustness of Bit Inversion and Program Evolution,” SICE Annual Conference (SICE2007), pp. 1155-1160, 2007.
  5. [5] T. Kimezawa and T. S. Ray, “Artificial Life System Tierra,” Technical Report TR-H-268, ATR Human Information Processing Research Laboratories, 1999.
  6. [6] T. S. Ray, “Documentation for the Tierra Simulator,”
    http://life.ou.edu/pubs/doc/index.html.
  7. [7] T. S. Ray, “An approach to the synthesis of life,” Artificial Life II, XI, pp. 371-408, 1991.
  8. [8] C. G. Langton, “Artificial Life,” Addison-Wesley, 1989.
  9. [9] ATR Evolutionary Systems Department, “Artificial Life and Evolutional System,” Tokyo Denki University Press, 1998.
  10. [10] D. E. Goldberg, “Genetic Algorithms in Search, Optimization, and Machine Learning,” Addison-Wesley, 1989.
  11. [11] A. Djupdal and P. C. Haddow, “The route to a defect tolerant LUT through artificial evolution,” Genetic Programming and Evolvable Machines, Vol.13, No. 3, pp. 281-303, 2011.
  12. [12] Y. Liu, G. Tempesti, J. A. Walker, J. Timmis, A. M. Tyrrell, and P. Bremner, “A Self-scaling Instruction Generator Using Cartesian Genetic Programming,”Genetic Programming, Vol.6621, pp. 298-309, 2011.
  13. [13] A. Stoica, A. Fukunaga, K. Hayworth, and C. Salazar-Lazaro, “Evolvable hardware for space applications,” Evolvable Systems: From Biology to Hardware, Vol.1478, pp. 166-173, 1998.
  14. [14] UNISEC, “UNITEC-1,” http://www.unisec.jp/unitec-1/, 2009.
  15. [15] Japan Aerospace Exploration Agency (JAXA), “Venus Climate Orbiter “AKATSUKI/PLANET-C”,”
    http://www.stp.isas.jaxa.jp/venus/top.english.html, 2008.

Creative Commons License  This article is published under a Creative Commons Attribution-NoDerivatives 4.0 Internationa License.

*This site is desgined based on HTML5 and CSS3 for modern browsers, e.g. Chrome, Firefox, Safari, Edge, Opera.

Last updated on Apr. 05, 2024