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1.8V-to-1.0V CMOS 65 nm MIPI RFFE Interface Circuit for Millimeter-wave Beamforming Array | IEEE Conference Publication | IEEE Xplore

1.8V-to-1.0V CMOS 65 nm MIPI RFFE Interface Circuit for Millimeter-wave Beamforming Array


Abstract:

A 1.8V MIPI RF front-end (RFFE) circuit for a slave with a 1.0V supply is designed using a CMOS 65 nm process as a control block for a millimeter-wave beamforming array. ...Show More

Abstract:

A 1.8V MIPI RF front-end (RFFE) circuit for a slave with a 1.0V supply is designed using a CMOS 65 nm process as a control block for a millimeter-wave beamforming array. It is consisted of a MIPI RFFE slave logic, power-on-reset (PoR), SCLK receiver, and SDATA transceiver to support the MIPI RFFE master-slave interface with MIPI RFFE bus. According to simulation results, the designed MIPI RFFE interface circuit provides rise and fall time of less than 3.3 ns with a 26 pF load (one master-eight slave configuration) at the transmission rate of 26 MHz, satisfying the requirement of 6.5 ns in the MIPI RFFE specification version 1.10.
Date of Conference: 17-20 February 2019
Date Added to IEEE Xplore: 02 May 2019
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Conference Location: PyeongChang, Korea (South)

References

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