Abstract:
An ultra-low power opamp is described. The amplifier has been designed and prototyped in 22nm CMOS FDSOI technology. Very low current consumption (1.1 μA at VDD=0.8v) and...Show MoreMetadata
Abstract:
An ultra-low power opamp is described. The amplifier has been designed and prototyped in 22nm CMOS FDSOI technology. Very low current consumption (1.1 μA at VDD=0.8v) and very low area (0.0277 mm2) make it suitable for multichannel bio signal recording arrays. Noise efficiency factor of 3.3 has been achieved. A unique feature of this opamp architecture is a negative feedback loop from the output to the body of an input transistor, which serves as a second gate. This circuit technique, possible only in FDSOI technology, allows to achieve perfectly linear voltage transfer curve while leaving both signal inputs of the amplifier free.
Published in: 2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems"
Date of Conference: 27-29 June 2019
Date Added to IEEE Xplore: 05 August 2019
ISBN Information:
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