Abstract:
In this contribution, the hardware acceleration of electromagnetic simulations on the reconfigurable field-programmable-gate-array (FPGA) card is presented. In the develo...Show MoreMetadata
Abstract:
In this contribution, the hardware acceleration of electromagnetic simulations on the reconfigurable field-programmable-gate-array (FPGA) card is presented. In the developed implementation of scientific computations, the matrix-assembly phase of the method of moments (MoM) is accelerated on the Xilinx Alveo U200 card. The computational method involves discretization of the frequency-domain mixed potential integral equation using the Rao-Wilton-Glisson basis functions and their extension to wire-to-surface junctions. Hardware resources in our FPGA card allow for synthesizing nine independent processing paths. The implementation is evaluated in a numerical test, which involves a simulation of radiation from a monopole antenna mounted on the roof of Dodge Shelby Charger car. Results show that the developed acceleration is 9.49× faster than a traditional (i.e., serial) central processing unit (CPU) MoM implementation, and about 1.66× faster than a parallel six-core CPU MoM implementation. However, in the considered numerical benchmark, the execution of the same computations on the hybrid CPU/FPGA platform reduces the power consumption 2.1× in comparison with the multicore implementation, hence, it allows for the reduction of environmental effects of scientific computing.
Published in: 2023 30th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)
Date of Conference: 29-30 June 2023
Date Added to IEEE Xplore: 09 August 2023
ISBN Information: